RFspace SDR-IP
Software Defined Receiver

Order #5121
Your Price: T.B.A.

This device has
not been approved
by the F.C.C.

Please also see
the SDR-14

 

 

 

The RFspace SDR-IP a high performance software defined radio covering 10 kHz to 32 MHz. It utilizes the latest FPGA and analog to digital technology. The SDR-ONE offers both upgradeable firmware and plug-in PC interface board.

The SDR-IP uses a high performance 80 MHz, 16 bit ADC with both dithering and randomization for best performance. The output I/Q bandwidth is fully configurable via software. PC communications are handled over a 100 base-T port using 24 bit I/Q words. A TCP connection is used to control the radio and a UDP connection is used to transfer the data back to the PC. The ethernet port allows easy interfacing to Windows, Mac OS, and Linux without the need of additional drivers. The use of IP protocol, allows the radio to be operated over the intranet. The SDR-ONE comes with two rotary encoders to configure the IP address and other future options.

The digital down converter used in the SDR-IP if fully configurable. It uses a Xilinx XC3S500E FPGA. The high performance receive modes use 32 bit precision. The analog front end uses a high dynamic range preamp with a bank of 10 preselector filters and 2 switchable attenuators. RF switching uses relays for better IMD. The HF antenna port also includes a spark gap for high voltage transients. The SDR-ONE can be configured with a low phase noise 80 MHz encode clock. This oscillator can be locked to reference clocks like GPS and rubidium standards. When not externally locked, the oscillator has a stability of +/- 1 ppm over temperature. The phase noise at 10 kHz is -170 dBc/Hz typical.

The information shown is preliminary. More information will be posted shortly.

NOTICE:
This device has not been approved by the Federal Communications Commission.
This device may not be sold or leased, or be offered for sale or lease, until approval of the F.C.C. has been obtained.